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| MIME-Version: | 1.0 |
| Date: | Wed, 25 Jul 2012 09:05:52 -0700 |
| Message-ID: | <CA+GuLwe5sPPWJQAQtX2mYTFYz5Dnt_wPy42ywZnY37dagsrEHQ@mail.gmail.com> |
| Subject: | [geda-user] how to use "clearance" and mask in pcb footprint |
| From: | Ram Bhamidipaty <rambham AT gmail DOT com> |
| To: | geda-user AT delorie DOT com |
| Reply-To: | geda-user AT delorie DOT com |
I am trying to create a foot print for a CUI PJ002B power jack. This is what
I have so far:
Element[0x00000000 "CUI PJ002B Power Jack" "" "" 1mm 1mm 0 0 0 100 0x00000000]
(
Pin[ -13mm 0mm 4.7mm 0.5mm 4.2mm 3.5mm "" "1" 0x00000001]
Pin[ -7mm 0mm 4.7mm 0.5mm 4.2mm 3.5mm "" "2" 0x00000001]
Pin[ -10.7mm -4.7mm 4.7mm 0.5mm 4.2mm 3.5mm "" "3" 0x00000001]
ElementLine( 0mm -7.5mm 0mm 5mm 0.1mm )
ElementLine( 0mm -7.5mm -18mm -7.5mm 0.1mm )
ElementLine( -18mm -7.5mm -18mm 5mm 0.1mm )
ElementLine( 0mm 5mm -18mm 5mm 0.1mm )
ElementLine( -2mm -2mm -2mm 2mm 0.1mm )
ElementLine( -2mm -2mm 0mm -2mm 0.1mm )
ElementLine( -2mm 2mm 0mm 2mm 0.1mm )
ElementLine( -9mm -5mm -6mm -5mm 0.1mm )
ElementLine( -6mm -5mm -6mm -2mm 0.1mm )
)
I'm pretty sure the way I am doing the pins with the mask and clearance
values is wrong. Are there some general rules I should follow for solder mask
and clearance values? Are clearance and mask values dependent on the
board fab rules?
Also this particular part has rectangular pins: 1mm x 3.5mm and 1mm x 3mm
from earlier emails folks are using pins to handle this - how much
larger does the
pin hole need to be?
Thanks for any help.
-Ram
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