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| Date: | Wed, 6 Jun 2012 14:38:52 +1000 |
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| Message-ID: | <CAKakQcfRbQ4S914dfPia4qX6cEoSyoR1iipH17DsPHMMjevFTw@mail.gmail.com> |
| Subject: | Re: [geda-user] Clearance between polygons on same layer group |
| From: | Stephen Ecob <stephen DOT ecob AT sioi DOT com DOT au> |
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On Wed, Jun 6, 2012 at 1:05 PM, Tim van Boxtel <tim AT studiofeed DOT com> wrote: > Great reply! > > The information about the join flag was helpful and it works if there is > only one polygon on a physical layer. Is there a way to force a clearance > between 2 polygons on different layers, yet the same layer group (i.e. > physical layer)? No, there is no way (currently) to force a clearance between 2 polygons in the same layer group. > I have found drawing the polygon with thick traces works as expected, though > it can be a touch cumbersome :) Yes, that's a commonly used workaround. Another workaround is to manually place your polygons, vertex by vertex, so that they have the desired clearance at each point. Tedious but do-able. Peter Clifton has a number of experimental branches of PCB that include cool features like anti-polygons and copper pours. Hopefully he'll find the time to merge these cool features into the PCB mainline at some stage, but even now they are available to experiment with: http://pcjc2.blogspot.com.au/2011/02/pcbgl-repository-instructions.html Of course these branches are not production code, so pay attention to Peter's caveats regarding their use.
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