Format of PCI Configuration data for Intel 82375 EISA Bridge:
Offset	Size	Description	)
 00h 64 BYTEs	header (see #00878)
		(vendor ID 8086h, device ID 0482h)
		(revision numbers: 03h = 82375EB, 04h = 82375SB)
 40h	BYTE	PCI Control
!!!intel\29047704.pdf pg. 32
 41h	BYTE	PCI Arbiter Control
 42h	BYTE	PCI Arbiter Priority Control
 43h	BYTE	PCI Arbiter Priority Control Extension
 44h	BYTE	MEMCS# Control
 45h	BYTE	MEMCS# Bottom of Hole
 46h	BYTE	MEMCS# Top of Hole
 47h	BYTE	MEMCS# Top of Memory
 48h	WORD	EISA Address Decode Control 1
 4Ah  2 BYTEs	reserved
 4Ch	BYTE	ISA I/O Recovery Time Control
 4Dh  7 BYTEs	reserved
 54h	BYTE	MEMCS# Attribute Register #15h	BYTE	MEMCS# Attribute Register #26h	BYTE	MEMCS# Attribute Register #37h	BYTE	reserved
 55h	BYTE	MEMCS# Attribute Register #26h	BYTE	MEMCS# Attribute Register #37h	BYTE	reserved
 56h	BYTE	MEMCS# Attribute Register #37h	BYTE	reserved
 57h	BYTE	reserved
 58h	BYTE	PCI Decode Control
 59h	BYTE	reserved
 5Ah	BYTE	EISA Address Decode Control 2
 5Bh	BYTE	reserved
 5Ch	BYTE	EISA-to-PCI Memory Region Attributes
 5Dh  3 BYTEs	reserved
 60h  4 DWORDs	EISA-to-PCI Memory Region Address registers 1-4
 70h  4 DWORDs	EISA-to-PCI I/O Region Address registers 1-4
 80h	WORD	BIOS Timer base address
 82h  2 BYTEs	reserved
 84h	BYTE	EISA Latency Timer Control Register
 85h  3 BYTEs	reserved
 88h	DWORD	PCEB Test Control Register ("DO NOT WRITE")
 8Ch 116 BYTEs	reserved
SeeAlso: #00878,#01055