Bitfields for Intel 8243x/8244x Programmable Attribute Map Register:
Bit(s)	Description	)
 7	reserved
 6	cache enable (region 1)
 5	write enable (region 1)
 4	read enable (region 1)
 3	reserved
 2	cache enable (region 0)
 1	write enable (region 0)
 0	read enable (region 0)
Notes:	each programmable attribute map register controls two memory
	  regions at the top of the first megabyte of memory
	for the Intel 82441FX and 82443BX/LX, bits 6 and 2 are reserved, as
	  cacheability is set using the Pentium Pro/II/Celeron's MTRR registers
	  (see MSR 000000FEh)
	Intel 82434,82437FX/MX/VX,82439HX,82441FX,82443EX/LX PAM
	  registers/regions:
		PAM0 low: reserved [*]
		PAM0 hi:  segment F000-FFFF
		PAM1 low: segment C000-C3FF
		PAM1 hi:  segment C400-C7FF
		PAM2 low: segment C800-CBFF
		PAM2 hi:  segment CC00-CFFF
		PAM3 low: segment D000-D3FF
		PAM3 hi:  segment D400-D7FF
		PAM4 low: segment D800-DBFF
		PAM4 hi:  segment DC00-DFFF
		PAM5 low: segment E000-E3FF
		PAM5 hi:  segment E400-E7FF
		PAM6 low: segment E800-EBFF
		PAM6 hi:  segment EC00-EFFF
	[*] on the 82434 (and possibly other Intel chipsets), the low nybble of
	  PAM0 controls segment 8000-9FFF
SeeAlso: #01055,#01108,#01098,#01099,#01229,#01106,#01107,#01142,#01129