X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com X-TCPREMOTEIP: 207.224.51.38 X-Authenticated-UID: jpd AT noqsi DOT com From: John Doty Content-Type: multipart/alternative; boundary="Apple-Mail=_13471CB4-A8F8-41B8-BE51-0A4DB352F99C" Mime-Version: 1.0 (Mac OS X Mail 10.3 \(3273\)) Subject: Re: [geda-user] [chscem] slow start Date: Thu, 20 Jul 2017 15:05:54 -0600 References: <20170719141700 DOT a9a156f68d8968c53ce1e46a AT gmail DOT com>

<31B5BD5F-73B5-44F7-B1B2-19C01D7C9661 AT noqsi DOT com> <5970FE10 DOT 9080903 AT xs4all DOT nl> To: "Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" In-Reply-To: <5970FE10.9080903@xs4all.nl> Message-Id: <1465D832-2CF3-44FB-961D-EFFDCFEA81D5@noqsi.com> X-Mailer: Apple Mail (2.3273) Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk --Apple-Mail=_13471CB4-A8F8-41B8-BE51-0A4DB352F99C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=utf-8 > On Jul 20, 2017, at 1:01 PM, Bert Timmerman (bert DOT timmerman AT xs4all DOT nl) = [via geda-user AT delorie DOT com] wrote: >=20 > John Doty wrote: >>=20 >>> On Jul 20, 2017, at 10:54 AM, John Griessen (john AT ecosensory DOT com = ) [via geda-user AT delorie DOT com = ] > wrote: >>>=20 >>> xschem: >>> VHDL / Verilog / Spice netlist, ready for simulation >>> Behavioral VHDL / Verilog code can be embedded as one of the = properties of the schematic block >>>=20 >>>=20 >>> These xschem abilities will be good goals to include in cschem. >>=20 >> We already have these for SPICE in gEDA and Lepton if you use the = gnet-spice-noqsi back end (https://github.com/noqsi/gnet-spice-noqsi) = for gnetlist. I believe both Lepton and Roland=E2=80=99s gnetlist = replacement now give the back end writer enough support to do Verilog = and VHDL right. So, we don=E2=80=99t need a new tool, just a couple of = new back ends. >>=20 >> John Doty Noqsi Aerospace, Ltd. >>=20 >> http://www.noqsi.com/ >>=20 >> jpd AT noqsi DOT com >>=20 >>=20 >>=20 > Hi John, >=20 > I'm afraid you do not comprehend ... this is going to happen ... = whatever arguments exist or comes up ... IIRC, the decision has = (probably) been made over a year ago ;-) Please don=E2=80=99t pretend that we don=E2=80=99t already have a good = part of the capability you want. Lepton, in particular, is dedicated to = extending the configurability of the tools. It only takes a few lines of = Scheme to do some pretty useful things. Usually, the hard part is = figuring out what you *really* need, not coding. >=20 > Get used to more choices for users ;-) And get used to continuing development of the gEDA-gaf paradigm that has = been so constructive for years. >=20 > Kind regards, >=20 > Bert Timmerman. >=20 >=20 >=20 > @Igor2: go for it ;-) @Igor2: a PCB program with a real physical model of the board interests = me more. Go for that, as I think you=E2=80=99re doing. Lepton will be = able to feed it. >=20 John Doty Noqsi Aerospace, Ltd. http://www.noqsi.com/ jpd AT noqsi DOT com --Apple-Mail=_13471CB4-A8F8-41B8-BE51-0A4DB352F99C Content-Transfer-Encoding: quoted-printable Content-Type: text/html; charset=utf-8

On Jul 20, 2017, at 1:01 PM, Bert Timmerman (bert DOT timmerman AT xs4all DOT nl) [via geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:

John = Doty wrote:

On Jul 20, 2017, at = 10:54 AM, John Griessen (john AT ecosensory DOT com <mailto:john AT ecosensory DOT com>) [via geda-user AT delorie DOT com= <mailto:geda-user AT delorie DOT com>] <geda-user AT delorie DOT com= <mailto:geda-user AT delorie DOT com>> wrote:

xschem:
VHDL / Verilog / Spice = netlist, ready for simulation
Behavioral VHDL / Verilog = code can be embedded as one of the properties of the schematic block

These xschem abilities will be = good goals to include in cschem.

We already have these for SPICE in gEDA and Lepton if you use = the gnet-spice-noqsi back end (https://github.com/noqsi/gnet-spice-noqsi) for gnetlist. = I believe both Lepton and Roland=E2=80=99s gnetlist replacement now give = the back end writer enough support to do Verilog and VHDL right. So, we = don=E2=80=99t need a new tool, just a couple of new back ends.

John Doty Noqsi Aerospace, Ltd.

http://www.noqsi.com/

jpd AT noqsi DOT com <mailto:jpd AT noqsi DOT com>

Hi John,

I'm afraid you do not comprehend ... this is = going to happen ... whatever arguments exist or comes up ... IIRC, the = decision has (probably) been made over a year ago ;-)

Please = don=E2=80=99t pretend that we don=E2=80=99t already have a good part of = the capability you want. Lepton, in particular, is dedicated to = extending the configurability of the tools. It only takes a few lines of = Scheme to do some pretty useful things. Usually, the hard part is = figuring out what you *really* need, not coding.

Get used to more choices for = users ;-)

And get used to continuing development of the gEDA-gaf = paradigm that has been so constructive for years.

Kind regards,

Bert = Timmerman.

@Igor2: go for it ;-)

@Igor2: a = PCB program with a real physical model of the board interests me more. = Go for that, as I think you=E2=80=99re doing. Lepton will be able to = feed it.

John Doty Noqsi = Aerospace, Ltd.

http://www.noqsi.com/

jpd AT noqsi DOT com

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