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Message-ID: <5970FE10.9080903@xs4all.nl>
Date: Thu, 20 Jul 2017 21:01:36 +0200
From: "Bert Timmerman (bert DOT timmerman AT xs4all DOT nl) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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To: geda-user AT delorie DOT com
Subject: Re: [geda-user] [chscem] slow start
References: <alpine DOT DEB DOT 2 DOT 00 DOT 1706300916510 DOT 27212 AT igor2priv> <20170719141700 DOT a9a156f68d8968c53ce1e46a AT gmail DOT com> <alpine DOT DEB DOT 2 DOT 00 DOT 1707191956040 DOT 27212 AT igor2priv> <CAOP4iL3v-kJ-V+n99y_9OzL5480O3KcJeEqC2tY29e6hnKOXFw AT mail DOT gmail DOT com> <f1cb7c32-99b0-03b5-f77b-5b8a24303231 AT ecosensory DOT com> <31B5BD5F-73B5-44F7-B1B2-19C01D7C9661 AT noqsi DOT com>
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Reply-To: geda-user AT delorie DOT com

John Doty wrote:
>
>> On Jul 20, 2017, at 10:54 AM, John Griessen (john AT ecosensory DOT com 
>> <mailto:john AT ecosensory DOT com>) [via geda-user AT delorie DOT com 
>> <mailto:geda-user AT delorie DOT com>] <geda-user AT delorie DOT com 
>> <mailto:geda-user AT delorie DOT com>> wrote:
>>
>> xschem:
>> VHDL / Verilog / Spice netlist, ready for simulation
>> Behavioral VHDL / Verilog code can be embedded as one of the 
>> properties of the schematic block
>>
>>
>> These xschem abilities will be good goals to include in cschem.
>
> We already have these for SPICE in gEDA and Lepton if you use the 
> gnet-spice-noqsi back end 
> (https://github.com/noqsi/gnet-spice-noqsi) for gnetlist. I believe 
> both Lepton and Roland’s gnetlist replacement now give the back end 
> writer enough support to do Verilog and VHDL right. So, we don’t need 
> a new tool, just a couple of new back ends.
>
> John Doty Noqsi Aerospace, Ltd.
>
> http://www.noqsi.com/
>
> jpd AT noqsi DOT com <mailto:jpd AT noqsi DOT com>
>
>
>
Hi John,

I'm afraid you do not comprehend ... this is going to happen ... 
whatever arguments exist or comes up ... IIRC, the decision has 
(probably) been made over a year ago ;-)

Get used to more choices for users ;-)

Kind regards,

Bert Timmerman.



@Igor2: go for it ;-)