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        Wed, 19 Jul 2017 12:55:03 -0700 (PDT)
Date: Wed, 19 Jul 2017 22:55:00 +0300
From: "Vladimir Zhbanov (vzhbanov AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To: geda-user <geda-user AT delorie DOT com>
Subject: Re: [geda-user] [chscem] slow start
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On Wed, Jul 19, 2017 at 06:55:09PM +0200, Svenn Are Bjerkem (svenn DOT bjerkem AT googlemail DOT com) [via geda-user AT delorie DOT com] wrote:
...
> An engineer with background in chip design put out his schematic
> semiconductor design tool on sourceforge. Currently targeting vhdl,
> verilog and spice. This is something to learn from for those who think
> that electronic design target FR4.
> 
> https://xschem.sourceforge.io
> 

Very interesting. And very similar to gschem (+ some gnetlist
functionality) as far as I can see after having browsed the
project documentation. Very very ;-) I hope to have time to look
at it a bit closer.

NIH principle in work? Well, I'm kidding... I know how it is
difficult sometimes to comprehend someone's code, especially when
it is complex enough and/or it is written in an unfamiliar
language... Once I was very unhappy when a new (?) developer broke
a mature (Python) program by rewriting some (most) of its parts in
C to make it more agile...  Not to blame anyone, and not to start
a flame :-)

-- 
  Vladimir