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From: "Svenn Are Bjerkem (svenn DOT bjerkem AT googlemail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
Date: Wed, 19 Jul 2017 18:55:09 +0200
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Subject: Re: [geda-user] [chscem] slow start
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On 19 July 2017 at 18:22, Ouabache Designworks (z3qmtr45 AT gmail DOT com)
[via geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
>
> What  attracted me to Cschem was the promise that it would be workflow
> agnostic. The problem with gschem,kicad and about all other schematic
> capture tools is that they are all designed to be PCB front end tools. You
> can have any feature as long as it would be useful in a PCB tool flow.
>

An engineer with background in chip design put out his schematic
semiconductor design tool on sourceforge. Currently targeting vhdl,
verilog and spice. This is something to learn from for those who think
that electronic design target FR4.

https://xschem.sourceforge.io

-- 
Svenn