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        Wed, 18 Jan 2017 08:21:55 -0800 (PST)
Date: Wed, 18 Jan 2017 17:21:51 +0100
From: "Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To: geda-user AT delorie DOT com
Subject: Re: [geda-user] [pcb] why no clearpoly on silk
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> Maybe I got something wrong. Normally clearance is between copper while the
> silk is painted on both?

Yes. Normally a board have plenty of copper traces with cleearance between. A layer of solder resist is put on top, usually green except on the pads or similar. Then silkscreen with text is painted/printed on both traces and clearance in between.

> You are correct, but there is no technical reason why you can't make lines
> on silk cut into (clear against) polygons on silk.

I fully agree. Most common reason for clearance is between nets which is formed by polygons on copper layers. There may be reasons to clear silk from certain areas and maybe for design rule check between silkscreen objects. If not done before I expect manufacturer want to do so to remove silkscreen from pads.

> Doing this makes the code and behaviour more consistent, although there is
> not the electrical reason for requiring it.

No reason electrical but there may be others so it is certainly more consistent. There might even be reasons for minimum width and clearance for non conductive layers.

> This said, you can't necessarily extend the logic completely to match. For
> example, I toyed with connectivity based island removal - that wouldn't
> make sense on silk layers.

The higher logic to handle the diffent layers will be different. I still think they could be built from the same primitives and need similar logical operations.

Layers made of copper form electrical nets which need clearance, these are made by plating and etching.

Board shape is formed by machining and usually there are plenty of holes drilled for vias/pins, for board it make sense to check minimum drilling distance and output a Excellon drill file.

It is common with a design rule check for solder resist.


Regards Nicklas Karlsson