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From: "Peter Clifton (petercjclifton AT googlemail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
Date: Wed, 18 Jan 2017 12:12:03 +0000
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Subject: Re: [geda-user] [pcb] why no clearpoly on silk
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On 18 Jan 2017 11:11, "Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via
geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> wrote:

Maybe I got something wrong. Normally clearance is between copper while the
silk is painted on both?


You are correct, but there is no technical reason why you can't make lines
on silk cut into (clear against) polygons on silk.

Doing this makes the code and behaviour more consistent, although there is
not the electrical reason for requiring it.

This said, you can't necessarily extend the logic completely to match. For
example, I toyed with connectivity based island removal - that wouldn't
make sense on silk layers.

Thinking about it, whilst you could use the "keep biggest piece" rule with
silk, I'd be tempted to just start with "full polygons" only. (For the
default flags if importing an old board).

Peter

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<div dir=3D"auto"><div><br><div class=3D"gmail_extra"><br><div class=3D"gma=
il_quote">On 18 Jan 2017 11:11, &quot;Nicklas Karlsson (<a href=3D"mailto:n=
icklas DOT karlsson17 AT gmail DOT com">nicklas DOT karlsson17 AT gmail DOT com</a>) [via <a href=
=3D"mailto:geda-user AT delorie DOT com">geda-user AT delorie DOT com</a>]&quot; &lt;<a h=
ref=3D"mailto:geda-user AT delorie DOT com">geda-user AT delorie DOT com</a>&gt; wrote:<b=
r type=3D"attribution"><blockquote class=3D"quote" style=3D"margin:0 0 0 .8=
ex;border-left:1px #ccc solid;padding-left:1ex"><div dir=3D"ltr">Maybe I go=
t something wrong. Normally clearance is between copper while the silk is p=
ainted on both?</div></blockquote></div></div></div><div dir=3D"auto"><br><=
/div><div dir=3D"auto">You are correct, but there is no technical reason wh=
y you can&#39;t make lines on silk cut into (clear against) polygons on sil=
k.</div><div dir=3D"auto"><br></div><div dir=3D"auto">Doing this makes the =
code and behaviour more consistent, although there is not the electrical re=
ason for requiring it.</div><div dir=3D"auto"><br></div><div dir=3D"auto">T=
his said, you can&#39;t necessarily extend the logic completely to match. F=
or example, I toyed with connectivity based island removal - that wouldn&#3=
9;t make sense on silk layers.</div><div dir=3D"auto"><br></div><div dir=3D=
"auto">Thinking about it, whilst you could use the &quot;keep biggest piece=
&quot; rule with silk, I&#39;d be tempted to just start with &quot;full pol=
ygons&quot; only. (For the default flags if importing an old board).</div><=
div dir=3D"auto"><br></div><div dir=3D"auto">Peter</div></div>

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