X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com X-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:from:date:message-id:subject:to; bh=Fe6euVXY00H6ZeAIDzv6ySQmDaYMRWBGaxi38ef6N5k=; b=LfNm19jZRNPVpjHUgkC2zkFIXa88rFbRoPOYMr6FEAEnFMJD8DEiSMoHA1w9JpIOwz HFR7UdoGDnLtFzxRXhdV9rBoHYrUxqzuXXuaCo4d4I4keilhB4U52CizjhKhbwRbRE7s A3qFn1RgZkVRSX+MdTyG2tHiQX3dCNW8812bTbipD9FcbA9OMzIyj/JtBGXUDImHg8ru qpvQEaS51AOnG40wu8AUZ4z9MPf0lpmv1Ytut/3P6y02aB3qE8nLxgnDSjJ+8H10pov/ DzmSYCSIRt59KivdlqDZpxHMQezAkWvbtDc+GvKAqnwQEAXLiRSZSGmy7LDpYjIKroe1 vpaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to; bh=Fe6euVXY00H6ZeAIDzv6ySQmDaYMRWBGaxi38ef6N5k=; b=UJKpL/agyVtxFoQGbJARChVt19XTf/maVtXjNxt618qf34znozASVuJYS5/x+yJJx8 /FwVxwdPpUMZMrYZeld9AiHMWzPLuYwtBJW8ZUSrNZKHQtD/VPciwQSB/gJc7ELetoN2 WrVvsMh2s1A22OXMh266jkA29ByCXzMU7y/4H0jatvhPVO4U1H6KP9ID/bkx5b66qI9n mt/pIyBff7cQP5zmABTcM/jJ1NEbRPAG+pwvnb0O8k3gQDCYtE5UtZQUIEZa0bJpX3EC RMozspU3Cr6XoGbXfcnZLKt5m0c/Wq7XePPdzxgNxS1htX3QwKLWpFvcoHUA5IjqqjPi cHBA== X-Gm-Message-State: AE9vXwNCKafUfe8wFF6N7YklzePdK3wVapc9389HB8UbmFpQ8u1QW+xr/IhgLqA8i0FAHj7t6vvxWae2/sobGw== X-Received: by 10.31.60.193 with SMTP id j184mr3812268vka.132.1472251718249; Fri, 26 Aug 2016 15:48:38 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <20160826171545.2bc54995@floyd.freeelectron.net> References: <57C09C3C DOT 7020708 AT xs4all DOT nl> <20160826171545 DOT 2bc54995 AT floyd DOT freeelectron DOT net> From: "Chad Parker (parker DOT charles AT gmail DOT com) [via geda-user AT delorie DOT com]" Date: Fri, 26 Aug 2016 18:48:37 -0400 Message-ID: Subject: Re: [geda-user] Microwave PCB layout simulation or How to eat all your processing power in 3 easy steps To: geda-user AT delorie DOT com Content-Type: multipart/alternative; boundary=001a11439ee6afb251053b015059 Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk --001a11439ee6afb251053b015059 Content-Type: text/plain; charset=UTF-8 FWIW, this is something I've thought a lot about also. It would be very cool, but as with all simulation, to do it and get an answer out that actually resembles the real world is really hard. There are a lot of details that have to be taken into account, and then you have to make sure that your fab gets them all right too when you build the board. You can get maybe 10% variation in the dielectric constant of FR4, for example. PCB is not currently aware of many of those details, like board material, layer thickness, the amount of prepreg between the layers, etc. so you'd still have to add all that information in somewhere. I have a situation right now where I'm putting a couple of vias in close proximity to each other and counting on the parasitic capacitance to couple in a test signal. I'd love to be able to simulate and get an idea of what the capacitance actually is. I'll have to build and test it to really figure it out. BTW, you need more than just Hyperlynx to do this. You need the specific Hyperlynx 3D field solver module. My employer has licenses for MG, including Hyperlynx, but that module is licensed separately (I was just looking into this last week). I don't know much about gnucap, but it seems like in order to use it to simulate a PCB like this, you still need to be able to abstract a circuit model from the layout, and that's what the fancy, expensive programs do. --Chad On Fri, Aug 26, 2016 at 5:15 PM, al davis wrote: > On Fri, 26 Aug 2016 21:45:00 +0200 > "Bert Timmerman (bert DOT timmerman AT xs4all DOT nl) [via geda-user AT delorie DOT com]" > wrote: > > So basically you wish for a Hyperlynx exporter for pcb ;-) > > Good luck getting Mentor (owner of Hyperlynx) to do that. > > What you really need is an exporter to gnucap-Verilog, or a plugin for > gnucap to read (and write) the pcb format. > > If somebody wants to write that gnucap plugin, I will help you do it. > > --001a11439ee6afb251053b015059 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable
FWIW, this is something I've thought a lot about = also. It would be very cool, but as with all simulation, to do it and get a= n answer out that actually resembles the real world is really hard. There a= re a lot of details that have to be taken into account, and then you have t= o make sure that your fab gets them all right too when you build the board.= You can get maybe 10% variation in the dielectric constant of FR4, for exa= mple. PCB is not currently aware of many of those details, like board mater= ial, layer thickness, the amount of prepreg between the layers, etc. so you= 'd still have to add all that information in somewhere.

I have a= situation right now where I'm putting a couple of vias in close proxim= ity to each other and counting on the parasitic capacitance to couple in a = test signal. I'd love to be able to simulate and get an idea of what th= e capacitance actually is. I'll have to build and test it to really fig= ure it out.

BTW, you need more than just Hyperlynx to do this.= You need the specific Hyperlynx 3D field solver module. My employer has li= censes for MG, including Hyperlynx, but that module is licensed separately = (I was just looking into this last week).

I don'= t know much about gnucap, but it seems like in order to use it to simulate = a PCB like this, you still need to be able to abstract a circuit model from= the layout, and that's what the fancy, expensive programs do.

<= /div>
--Chad

On Fri, Aug 26, 2016 at 5:15 PM, al davis <ad252 AT fre= eelectron.net> wrote:
On Fr= i, 26 Aug 2016 21:45:00 +0200
"Bert Timmerman (bert DOT timmerman AT xs4all DOT nl) [via geda-user AT delorie DOT com]"
<geda-user AT delorie DOT com> = wrote:
> So basically you wish for a Hyperlynx exporter= for pcb ;-)

Good luck getting Mentor (owner of Hyperlynx) to do that.

What you really need is an exporter to gnucap-Verilog, or a plugin for
gnucap to read (and write) the pcb format.

If somebody wants to write that gnucap plugin, I will help you do it.


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