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Subject: Re: [geda-user] Wilkinson splitter - how to implement and use?
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Date: Mon, 1 Aug 2016 12:21:48 -0500
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On 08/01/2016 11:47 AM, Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com] wrote:
> I am pretty sure a flag exclude from connectivity test on the drawing primitives connecting pins would do the trick.
>
>
>> > that would allow solving both Michael's problem, and the star-ground problem
>> > that has been discussed sporadically over the years.

When we get to using the tools for printable electronics this comes up again, and that's soonish.

There will be a need for resistive layers that can connect, yet not trigger a short because of their
attributes.  Such resistive layers would need to be inside a footprint boundary always to avoid big trouble.

To debug shorts when they are on board it might be good to temporarily make them invisible and nonconductive, yet still located
at coordinates.  Or make a temporary save function that will draw them all back with all attribs after a set is deleted for 
debugging purposes.

Then layout vs. netlist DRC checks could be a 2 step dance, where pin to pin connectivity is gotten with one, and
all connectivity including "printed electronics" is checked only after the first is free of shorts.
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