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Date: Mon, 6 Jun 2016 20:14:25 +0200
From: "Lev (leventelist AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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Subject: Re: [geda-user] "keepaway" vs. "clearance"
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 Content preview:  On Mon, 6 Jun 2016 10:04:22 +0200 (CEST) > It's a random limit
    that can be changed compile-time. AFAIK raising > it might cause compatibility
    problems, tho: if you open the design > with 16 styles with a pcb that has
    a limit of 4 and save, it will > probably remove all styles above 4. > >
   (I have plans to rewrite this part to be dynamic in pcb-rnd as part > of the
    config rewrite.) [...] 
 
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On Mon, 6 Jun 2016 10:04:22 +0200 (CEST)
gedau AT igor2 DOT repo DOT hu wrote:

> It's a random limit that can be changed compile-time. AFAIK raising
> it might cause compatibility problems, tho: if you open the design
> with 16 styles with a pcb that has a limit of 4 and save, it will
> probably remove all styles above 4.
> 
> (I have plans to rewrite this part to be dynamic in pcb-rnd as part
> of the config rewrite.)

Nice!

Hope it (and probably other changes) gets merged back to the main PCB tree.

Lev

-- 
73 de HA5OGL
Op.: Levente