X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com X-TCPREMOTEIP: 207.224.51.38 X-Authenticated-UID: jpd AT noqsi DOT com Content-Type: multipart/signed; boundary="Apple-Mail=_8E56BE8D-CA49-4336-BAC1-E16D0F45DBED"; protocol="application/pgp-signature"; micalg=pgp-sha512 Mime-Version: 1.0 (Mac OS X Mail 7.3 \(1878.6\)) Subject: Re: [geda-user] pcb loop paste buffer, renumber (first multi channel design) X-Pgp-Agent: GPGMail 2.5.2 From: John Doty In-Reply-To: Date: Tue, 19 Jan 2016 09:19:02 -0700 Message-Id: <96588D7E-3ADB-4F73-99DD-9E737AFF31B4@noqsi.com> References: <20151021192359 DOT 3dd8ad6d253c781da5523554 AT gmail DOT com> <201510211839 DOT t9LIdVcv027165 AT envy DOT delorie DOT com> <20151021222506 DOT 79643602de30ad2dd5541165 AT gmail DOT com> <20151022115247 DOT 3c1c2f13 AT akka> <20151022123903 DOT dddb6c83fa5a3db0963f4162 AT gmail DOT com> <201510221641 DOT t9MGfxJq003243 AT envy DOT delorie DOT com> <20151022212642 DOT abe0686f3bb04a3067667c43 AT gmail DOT com> <201510221951 DOT t9MJpjgA013544 AT envy DOT delorie DOT com> <562951C5 DOT 2010500 AT xs4all DOT nl> <562B531C DOT 5090004 AT xs4all DOT nl> <20160118171041 DOT 60f9ff0fd41a668af0fa84f4 AT gmail DOT com> <569D3751 DOT 2020402 AT xs4all DOT nl> <569D4266 DOT 7000905 AT prochac DOT sk> <20160119135636 DOT 8b2397941a5d4c4f48c9a626 AT gmail DOT com> <569E3532 DOT 2000701 AT iee DOT org> <20160119145802 DOT 81daa1f66cbb5cfebbba834c AT gmail DOT com> <569E4CE9 DOT 6030900 AT iee DOT org> To: geda-user AT delorie DOT com X-Mailer: Apple Mail (2.1878.6) Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk --Apple-Mail=_8E56BE8D-CA49-4336-BAC1-E16D0F45DBED Content-Type: multipart/alternative; boundary="Apple-Mail=_E0308476-0CE9-48C0-BEAE-47A0BEABB6DA" --Apple-Mail=_E0308476-0CE9-48C0-BEAE-47A0BEABB6DA Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=windows-1252 On Jan 19, 2016, at 8:53 AM, Peter Clifton = (petercjclifton AT googlemail DOT com) [via geda-user AT delorie DOT com] = wrote: > Really you need to have a reuse at the schematic level before you can = expect any intelligent behaviour in the pcb tool. >=20 > I've done multi channel designs with hierarchical schematics before... = The rename just becomes X1/R1 -> X2/R1 etc... >=20 > My rename plugin might still be floating about somewhere = "sedrename"... Now we've got more plugins committed with the main = repository, it might be fun to dig that one out and include it too... = Was very handy when your transformation between channels can be = expressed as a regex. >=20 > The main downside with heirarchical refdes is the silkscreen and board = fab house. They HATED IT. Couldn't cope with the long heirarchical = refdes, didn't WANT to cope with the patch I applied to just put the = last heirarchical part on the silk by each part, but then drew boxes = manually with module designations. >=20 >=20 The printed circuit culture is a little behind the times. With some = gnetlistrc/Makefile work, you can make hierachical netlists from gschem = schematics. They=92re useful if you=92re doing ASIC design, but you get = various downstream issues if you want printed circuits. > In the end, I used pcb's renumber feature to assign completely new = refdes on the board, but instead of back annotating (impossible as we = stand, with heirarchical schematics),I added a quick kludgy patch to = read back in the rename file, so pcb could map between the gnetlist = produced heirarchical netlist, and the flat refdes on the board. >=20 > Made debugging extra fun, having to manually indirect from = heirarchical schematic refdes to on board refdes, but at least it didn't = upset the board assembly fab! >=20 > I suppose I could also have post proceed out a flattened set of = schematics with the renamed refdes if that became useful. >=20 >=20 Existing capability. You can flatten schematics with = https://github.com/xcthulhu/lambda-geda, and then edit the refdeses with = textutils. Or you can use one of the refdes renumberers kicking around = after flatten. > Peter >=20 John Doty Noqsi Aerospace, Ltd. http://www.noqsi.com/ jpd AT noqsi DOT com --Apple-Mail=_E0308476-0CE9-48C0-BEAE-47A0BEABB6DA Content-Transfer-Encoding: quoted-printable Content-Type: text/html; charset=windows-1252
On Jan 19, 2016, at 8:53 AM, Peter = Clifton (petercjclifton AT googlemail DOT co= m) [via geda-user AT delorie DOT com] <geda-user AT delorie DOT com> = wrote:

Really you need to have a reuse at the = schematic level before you can expect any intelligent behaviour in the = pcb tool.

I've done multi channel designs with = hierarchical schematics before... The rename just becomes X1/R1 -> = X2/R1 etc...

My rename plugin might still be floating = about somewhere "sedrename"... Now we've got more plugins committed with = the main repository, it might be fun to dig that one out and include it = too... Was very handy when your transformation between channels can be = expressed as a regex.

The main downside with = heirarchical refdes is the silkscreen and board fab house. They HATED = IT. Couldn't cope with the long heirarchical refdes, didn't WANT to cope = with the patch I applied to just put the last heirarchical part on the = silk by each part, but then drew boxes manually with module = designations.



The printed = circuit culture is a little behind the times. With some = gnetlistrc/Makefile work, you can make hierachical netlists from gschem = schematics. They=92re useful if you=92re doing ASIC design, but you get = various downstream issues if you want printed circuits.

In the end, I used pcb's renumber feature = to assign completely new refdes on the board, but instead of back = annotating (impossible as we stand, with heirarchical schematics),I = added a quick kludgy patch to read back in the rename file, so pcb could = map between the gnetlist produced heirarchical netlist, and the flat = refdes on the board.

Made debugging extra fun, having to manually indirect from = heirarchical schematic refdes to on board refdes, but at least it didn't = upset the board assembly fab!

I suppose I could also = have post proceed out a flattened set of schematics with the renamed = refdes if that became = useful.



Existing = capability. You can flatten schematics with https://github.com/xcthul= hu/lambda-geda, and then edit the refdeses with textutils. Or you = can use one of the refdes renumberers kicking around after = flatten.

Peter


John = Doty        =       Noqsi = Aerospace, Ltd.

http://www.noqsi.com/

jpd AT noqsi DOT com



= --Apple-Mail=_E0308476-0CE9-48C0-BEAE-47A0BEABB6DA-- --Apple-Mail=_8E56BE8D-CA49-4336-BAC1-E16D0F45DBED Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename=signature.asc Content-Type: application/pgp-signature; name=signature.asc Content-Description: Message signed with OpenPGP using GPGMail -----BEGIN PGP SIGNATURE----- Comment: GPGTools - https://gpgtools.org iQIcBAEBCgAGBQJWnmH3AAoJEF1Aj/0UKykRJRUP/iNpwp82IaTecNCxJKg5sK2U a2i6c0BqUP+IEIxLSoXxqLH4n2POeEfOi/40Ouz/lHVlQ0O573n/CaCtaIIg2yLG RLF804ePqtFYmx53XlXs6s72uR5LwGiAXAvEPVrGP1FUaUe4o3v7tDaxM2Q+bhCb siMnTRYPemkCiy265jkslxse7OAA4d7R2QEqGmen+wUhEaSfDbiMgH2Xy64i9hIH ZxKIXKBvUfC9M2r0sYTY/gJgQSnnsyqeJwwcA57KDn6dScCHcgvRWrzlK3PiTHCA ttQcpBZNKEPWvZ3bA36rjt7cbvxeGtBNV3JNL0Uy+0kVf0tsqjf/aX5Pe0CJ+oUQ Xq5XDK0PyUHA1Dkrn/wquHO2U7Hs8JD9T0HMJVrfOs+mBaZPrA243/TTmQELSM8w yxmQ/yf8uWa5ekhRHFBj55ID/e0BD17IIbSqr8KdbUizILnaf4Sr7Plx8P+XEEVQ lN0UA/GVF2BGXesEjaWNxT2NpyQKESlgqHpMO7qnZRhu3UqHgHzoTrGHVXJ6UosF +0trQTem1Qh5ZaTyVUxs3OTkSxq3dXuHd0Rhzl71FQ7N2jGpWYyfgwYCxsreRKnr QSCPYpTk/PEZuzm6agaVW0XBJfP450TO7ATkAH6qtvi/iROogOHXT8SMFZmmB//e UtZ+bknUMbdEvNlAETso =DkMF -----END PGP SIGNATURE----- --Apple-Mail=_8E56BE8D-CA49-4336-BAC1-E16D0F45DBED--