X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com Message-ID: <50853B5E.9060107@laserlinc.com> Date: Mon, 22 Oct 2012 08:26:06 -0400 From: Joshua Lansford User-Agent: Mozilla/5.0 (X11; Linux i686; rv:15.0) Gecko/20120907 Thunderbird/15.0.1 MIME-Version: 1.0 To: geda-user AT delorie DOT com Subject: Re: [geda-user] FPGA / CPLD development with Linux References: <1350863030 DOT 93187 DOT YahooMailNeo AT web121004 DOT mail DOT ne1 DOT yahoo DOT com> <5084AA9A DOT 404 AT optonline DOT net> In-Reply-To: <5084AA9A.404@optonline.net> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Reply-To: geda-user AT delorie DOT com My experience has been with Xilinx. Older wiser folks feel free to correct me if I am off on any of this. They have a free web-pack version of their development environment which runs on Linux. The limitations of the web-pack are that you can't target the super large devices. However I know you can target up to the Spartan 6 LX75 because that is the FPGA I am using. And with each release of a new Webpack version it supports more then it did before. You also can't use chipScope pro which lets you put a virtual oscope in your FPGA though the JTAG. Besides that I haven't felt much limitation due to the Webpack. Even their simulator still works with the Webpack. I am running their Webpack on Debian. I would agree that I would stick to a textual design such as VHDL or Verilog. If you are planning on using open source cores or tools I would suggest Verilog. For example the open source PCI bridge and Ethernet MAC from opencores.org are in Verilog. (Do note that it is hard to satisfy the rebuilt write required by LGPL especially in ASIC so be aware of that before you head down that road...) Xilinx has a community forum where I have gotten very good support and advice on all sorts of topics related to FPGAs. One more thing, Xilinx currently is in transition from one IDE to a new one. So if you don't know either and you want to go with Xilinx, learn the PlanAhead IDE instead of the ISE IDE. Synthesizing logic to physical layout of a FPGA is very specific to a particular company which made that chip and I don't know that there is any open source tool that can do that. ~Joshua