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From: karl AT aspodata DOT se
To: geda-help AT delorie DOT com
Subject: Re: [geda-help] Wire bridges in gschem?
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Comments: In-reply-to HansFong <hansfong AT zonnet DOT nl>
   message dated "Fri, 23 Mar 2018 21:00:37 +0800."
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Date: Fri, 23 Mar 2018 14:32:50 +0100 (CET)
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Hans:
> In PCB you can draw arbitrary lines and vias, which is handy if you want 
> to insert a single test pin (a physical pin you put on your PCB to hook 
> up a probe) in a line, or make a wire bridge (two vias with nothing in 
> between and an arbitrary distance in between them). I can't find a way 
> (component) to let a net end in a via or connect two nets with a via.
...

A test point is in principle a component and different variants of 
test points have different req. with regard to hole or pad size.

So, for test points:
 analog/testpt-1.sym from the std. library
 http://turkos.aspodata.se/git/openhw/share/pcb/_connector/tp_keystone_5020_c.fp

Wire bridges could be treated like a component (near zero ohm resistor 
if you like), or copper on a "separate layer" which you "don't etch" nor 
send to fab. I treat it currently like a component, e.g.
 use a resistor symbol, e.g. analog/resistor-2.sym
 http://turkos.aspodata.se/git/openhw/share/pcb/_passive/jumper_20.fp
The drawback is that you have to add a wire link symbol whenever you
use them.

Regards,
/Karl Hammar

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