X-Authentication-Warning: delorie.com: mail set sender to geda-help-bounces using -f X-Recipient: geda-help AT delorie DOT com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :content-type; bh=P6i9LEALincvcje6D0NYDk0nH4Lik+d83xZolmyfZEo=; b=U8JO8UrNgOcNUSOpyZIXKgyPFiSMM3B5vNi0wlBGlD1tNXNWGSpf9v3RxuU+Vig/3f NgD1cD2qutAfz34C0UYjBmXAGkHKy9F3fwpAspUzPdstZK3UKytUnWRh59WzlN8pnT4t XWyAwF+Tty1UlIPajb/gnixr5H+Olx03DhuZDU1+xassH+CCeR+ipQTPkwKlXlzW4AdB N8W9hS1vXrcsdSfGvr14J/sktNPdYC9QKBG0u0Ja8alXLVU3AcNgGXkaj90IO8WVwnWQ XhJ+Vq1u2sWIqO6VpG51GIPHP8YH2fTPZGiV54tOeyW2qliiEedrNe115ASj+nO9aUyn p5NA== X-Received: by 10.182.125.3 with SMTP id mm3mr26188757obb.7.1416264996689; Mon, 17 Nov 2014 14:56:36 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <201411171908.sAHJ8Fm3006347@envy.delorie.com> References: <5468F15C DOT 2030907 AT hallowell DOT com> <201411170252 DOT sAH2q386004662 AT envy DOT delorie DOT com> <201411171908 DOT sAHJ8Fm3006347 AT envy DOT delorie DOT com> From: Mike Bushroe Date: Mon, 17 Nov 2014 15:56:06 -0700 Message-ID: Subject: Re: [geda-help] Multiple supply voltages To: geda-help AT delorie DOT com Content-Type: multipart/alternative; boundary=089e01229ea8091cdd050815e419 Reply-To: geda-help AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-help AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk --089e01229ea8091cdd050815e419 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable As to my original problems, using the power forms only re-attempt, once DJ had reminded me that the error checking was being done after all the elements are dog piled into a single corner, the shorts dropped done to two. But even after re-editing the schematic and re-replacing the voltage regulators and full-wave rectifier bridge symbols with sanitized versions, and dispersing all elements I STILL get the GND and minus 120V supply rails listed as shorting each other out on just about every pin. So I still think there is some hidden assumption that the low side of a 7805 or a full-wave is going to GND, and that is causing the warning messages. But the rats still look correct. I have gone back to the previous version with one huge top level and 3 separate copies of the sub-schematic and I am trying to layout that conversion to pcb. The error log shows a much larger list of shorted out nets, but so far it looks like most of the rat lines go where they should. I will still have to fix the netlist to combine the 4 instances of the 3phase (and thus 3 slot) MOSFET driver chip (FAN7388). The conversion turned each slot into a new element, and somehow the top level schematic got one too. But other than that I may be able to complete the placement and trace routing if I just ignore the million error messages. Mike On Mon, Nov 17, 2014 at 12:08 PM, DJ Delorie wrote: > > > Doesn't that risk breaking things for people who did not embed symbols > > into their designs? > > Of course it would. That's why fixing it is so hard. > --=20 "Creativity is intelligence having fun." =E2=80=94 Albert Einstein --089e01229ea8091cdd050815e419 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable
As to my original problems, using the power form= s only re-attempt, once DJ had reminded me that the error checking was bein= g done after all the elements are dog piled into a single corner, the short= s dropped done to two. But even after re-editing the schematic and re-repla= cing the voltage regulators and full-wave rectifier bridge symbols with san= itized versions, and dispersing all elements I STILL get the GND and minus = 120V supply rails listed as shorting each other out on just about every pin= . So I still think there is some hidden assumption that the low side of a 7= 805 or a full-wave is going to GND, and that is causing the warning message= s. But the rats still look correct.

=C2=A0 I have gone back to= the previous version with one huge top level and 3 separate copies of the = sub-schematic and I am trying to layout that conversion to pcb. The error l= og shows a much larger list of shorted out nets, but so far it looks like m= ost of the rat lines go where they should. I will still have to fix the net= list to combine the 4 instances of the 3phase (and thus 3 slot) MOSFET driv= er chip (FAN7388). The conversion turned each slot into a new element, and = somehow the top level schematic got one too. But other than that I may be a= ble to complete the placement and trace routing if I just ignore the millio= n error messages.

Mike
On Mon, Nov 17, 2014 at 12:08 PM, DJ Delorie <dj@= delorie.com> wrote:

> Doesn't that risk breaking things for people who did not embed sym= bols
> into their designs?

Of course it would.=C2=A0 That's why fixing it is so hard.



--
"Creativity is intelligence having fun." =E2=80=94 Albe= rt Einstein
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