From: "H.Shiozaki" Newsgroups: comp.os.msdos.djgpp Subject: Re: Help about Interrupt Handler for RTC Date: Mon, 2 Sep 2002 01:31:39 +0900 Organization: @nifty netnews service Lines: 243 Message-ID: References: <3D710347 DOT C05514D3 AT phekda DOT freeserve DOT co DOT uk> NNTP-Posting-Host: ntttkyo03130.ppp.infoweb.ne.jp Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_0055_01C25220.7C61A3C0" X-Trace: news522.nifty.com 1030897764 15476 211.2.126.130 (1 Sep 2002 16:29:24 GMT) X-Complaints-To: - NNTP-Posting-Date: Sun, 1 Sep 2002 16:29:24 +0000 (UTC) X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2600.0000 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2600.0000 To: djgpp AT delorie DOT com DJ-Gateway: from newsgroup comp.os.msdos.djgpp Reply-To: djgpp AT delorie DOT com This is a multi-part message in MIME format. ------=_NextPart_000_0055_01C25220.7C61A3C0 Content-Type: text/plain; charset="iso-2022-jp" Content-Transfer-Encoding: 7bit TO Mr. Richard Dawe. "Richard Dawe" wrote in message news:3D710347 DOT C05514D3 AT phekda DOT freeserve DOT co DOT uk... > Hello. > > "H.Shiozaki" wrote: > [snip] > > Please someone help me. > > Attached IRQ8smp4.c file is can be compiled > > with no error, but not work. > [snip] > How does it fail? -------------------------- The program run, but Irq8_Interrupt_Handler not work. If it work, it display the interrupt number per line until key type. I add it, TC(Turbo C++ Ver.4.0) code, using #ifdef __TURBO__ and #ifdef __DJGPP__ Attached irq8smp5.c file is a new one(ver.5). Compile method is written at top of the file as: gcc -v -Wall -o irq8djg5.exe irq8smp5.c (for GCC) tcc -w irq8smp5.c ==>> irq8smp5.exe irq8smp.exe work, but irq8djg.exe not work. irq8djg5 result [ 0]: 0 It can exit by ^C. irq8smp5 result [452]: 0 [453]:233 ::: ::: -------------------------- My PC environment: Win98(DOS-BOX) + DJGPP(V.204) + GCC 3.1 -------------------------- I'm sorry for my bad English. Thank you. from H.Shiozaki ------=_NextPart_000_0055_01C25220.7C61A3C0 Content-Type: application/octet-stream; name="irq8smp5.c" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="irq8smp5.c" /* irq5smp5.c : basecally got from http://www.delorie.com/djgpp/doc/ug/interrupts/overview.html Title is Guide: Interrupts Overview, Written by Peter Marinov: changed from TIMER_IRQ_0 to RTC_IRQ_8 by me ver.5 : add Turbo C (V4) environment */ /* compile: gcc -v -Wall irq8smp5.c -o irq8djg5.exe : for DJGPP commile: tcc -w irq8smp5.c =3D=3D=3D>>> irq8smp5.exe : for TC=20 */ //Simple Example of chaining interrupt handlers //Adopted from Matthew Mastracci's code #ifdef __DJGPP__ #include #include #include #include void RTC_Handler(void); //macros by Shawn Hargreaves from the Allegro library for locking //functions and variables. #define LOCK_VARIABLE(x) _go32_dpmi_lock_data((void = *)&x,(long)sizeof(x)); #define LOCK_FUNCTION(x) _go32_dpmi_lock_code(x,(long)sizeof(x)); #endif #ifdef __TURBOC__ #include #include #include void interrupt RTC_Handler(void); /* RTC Interrupt PIE Mode = */ void interrupt (*irq8_old_handler)(void); /* RTC Interrupt = old_handler */ #endif int main(void); void set_rtc(void); void restore_rtc(void); void write_rtc(unsigned char reg_n, unsigned char val); unsigned char read_rtc(unsigned char reg_n); #define INT_RTC 0x70 /* IRQ_8 INT # */ #define PICM_ISR 0x20 /* PIC_Master OCW2 */ #define PICM_IMR 0x21 /* OCW1 */ #define PICS_ISR 0xA0 /* PIC_Slave OCW2 */ #define PICS_IMR 0xA1 /* OCW1 */ #define RTC_REG_A 0x0A /* OSC and define SQW Frequency */ #define RTC_REG_B 0x0B /* INTerrupt and Operation Mode */ #define RTC_REG_C 0x0C /* Interrupt Flags, cleared by read REG_C */ #define RTC_REG_D 0x0D /* RTC Battery check (bit7=3D1:Ok)*/ #define RTC_8192Hz 0x23 /* REG_A: frequency Max. */ #define RTC_1024Hz 0x26 /* REG_A: frequency Default PC */ #define RTC_0128Hz 0x29 /* REG_A: frequency 128Hz */ #define RTC_0002Hz 0x2F /* REG_A: frequency Min. */ #define RTC_PIE_SQW_MODE 0x4A =20 /* REG_B: Periodic Interrupt Enable and Square Wave Generator Enable = MODE */ volatile int counter =3D 0; /* irq8 counter */ unsigned char rtc_reg_a; /* saved RTC_REG_A for restore */ unsigned char rtc_reg_b; /* not used , currently */ unsigned char imr_slave; /* not used , currently */ #ifdef __DJGPP__ void RTC_Handler(void) #endif #ifdef __TURBOC__ void interrupt RTC_Handler(void) /* RTC Interrupt PIE Mode = */ #endif { counter++; // MUST NEED "read REG_C" to use this interrupt continuiusely=20 outportb(0x70, RTC_REG_C); /* set reg_pointer REG_C */ inportb(0x71); /* clear REG_C by read it */ // this is need because NOT redirect to oldhandler_irq8 outportb(PICS_ISR, 0x20); /* EOI to PIC_Slave, non specific to irq0 = */ outportb(PICM_ISR, 0x20); /* EOI to PIC_Master, non specific to irq2 = */ enable(); // asm ("sti"); /* need or not ?? */ } int main(void) { int t; int i=3D0; set_rtc(); /* intialize RTC: REG_B */ #ifdef __DJGPP__ //structures to hold selector:offset info for the ISRs _go32_dpmi_seginfo OldISR, NewISR; // printf("About to chain the new ISR onto the old timer ISR..\n"); //lock the functions and variables, ie. aboid swapout */ LOCK_FUNCTION(RTC_Handler); LOCK_VARIABLE(counter); //load the address of the old timer ISR into the OldISR structure _go32_dpmi_get_protected_mode_interrupt_vector(INT_RTC, &OldISR); //point NewISR to the proper selector:offset for handler function NewISR.pm_offset =3D (int)RTC_Handler; NewISR.pm_selector =3D _go32_my_cs(); //chain the new ISR onto the old one so that first the old timer ISR //will be called, then the new timer ISR // _go32_dpmi_chain_protected_mode_interrupt_vector(INT_RTC,&NewISR); /**** changed to no redirected ****/ printf("Type any Key to proceed, and type again any key to stop.\n"); getkey(); #endif #ifdef __TURBOC__ irq8_old_handler =3D getvect(INT_RTC); /* IRQ_08 : 0x70 */ setvect(INT_RTC, RTC_Handler); printf("Type any Key to proceed, and type again any key to stop: \n"); while(1){ if(kbhit()) {=20 getch(); if(kbhit()=3D=3D0) break; } } #endif //notice no changes to counter in this main_loop, the interrupt changes = it while (!kbhit()){ printf("[%3d]:%3d\n",counter, i); i =3D 0 ; t =3D counter; while(t =3D=3D counter){ i++; inportb(0x378); /* duumy delay */ } } printf("Removing new ISR from the timer ISR chain\n"); #ifdef __DJGPP__ //load the old timer ISR back without the new ISR chained on _go32_dpmi_set_protected_mode_interrupt_vector(INT_RTC, &OldISR); #endif #ifdef __TURBOC__ setvect(INT_RTC, irq8_old_handler);=20 #endif restore_rtc(); /* restore RTC: REG_B */ return 0; } ////////////////////////////////////////////////////// void set_rtc(void) { rtc_reg_a =3D read_rtc(RTC_REG_A); /* save cuurent mode */ rtc_reg_b =3D read_rtc(RTC_REG_B); =20 =20 // write_rtc(RTC_REG_A, RTC_1024Hz); /* 0x26: frequency=3D1024Hz(PC = Default)*/ write_rtc(RTC_REG_B, RTC_PIE_SQW_MODE); /* 0x4A: 0100 1010, PIE=3DOn = */ // printf("set_rtc: REG_A: current=3D%02Xh, new=3D%02Xh.\n", rtc_reg_a, = RTC_1024Hz); printf("set_rtc: REG_B: current=3D%02Xh, new=3D%02Xh.\n",=20 rtc_reg_b, RTC_PIE_SQW_MODE); // printf("set_rtc: RTC frequency=3D%d[Hz]\n", 1<<(16-f)); } void restore_rtc(void) { // write_rtc(RTC_REG_A, rtc_reg_a); write_rtc(RTC_REG_B, rtc_reg_b); read_rtc(RTC_REG_C); /* Clear REG_C by Read REG_C */ } void write_rtc(unsigned char reg_n, unsigned char val) { outportb(0x70, reg_n); /* set reg_pointer */ outportb(0x71, val); /* write val to that register */ } unsigned char read_rtc(unsigned char reg_n) { unsigned char rd; outportb(0x70, reg_n); /* set reg_pointer */ rd =3D inportb(0x71); /* read from that register */ return(rd); } =1A ------=_NextPart_000_0055_01C25220.7C61A3C0--