Date: Sun, 11 Jun 2000 10:14:25 +0530 (IST) Message-Id: <200006110444.KAA05347@bgl2.vsnl.net.in> From: Prashant TR To: alex DOT fru AT mtu-net DOT ru CC: djgpp AT delorie DOT com In-reply-to: <39425BB5.D68FC69E@mtu-net.ru> (alex.fru@mtu-net.ru) Subject: Re: PMode stuff References: <39425BB5 DOT D68FC69E AT mtu-net DOT ru> Reply-To: djgpp AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: djgpp AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk I've created a mailing list at pmode AT egroups DOT com. People who want to contribute stuff can send them to this address. Anyone is free to subscribe. To subscribe: Send blank E-Mail to pmode-subscribe AT egroups DOT com To unsubscribe: Send blank E-Mail to pmode-unsubscribe AT egroups DOT com Posting to the group is allowed even if you aren't subscribed. Please feel free to make any contributions. Thanks, Prashant > > Hello Prashant! > > I've just read your html doc about PMode and realized to come up with a > suggestion. > First, general information and advantages of PMode are described quite well > in your doc. > > If you're really good at PMode and you're going to keep on continuing this > doc in details, I'd like to work on it in cooperation with you. > > I think we can cooperate your English skills and my real PMode knowlege (I > know nothing about yours, please forgive me :). > I'm writing PMode tutorials. > They are mix of C and ASM (maximum C, minimum ASM). And they're being done > with such free compilers as Turbo C 2.01 and NASM 0.98. > > Right now I've finished 15 tutorials... Two weeks of job. But I have to > provide a good documentation. A month minimum for me. :)) So why don't we do > this stuff much cooler and more practical: doc + example programs? > > Here goes a list of ready-made tutorials with some comments: > > TUT01 Switches to PMode and back to real mode using CR0. On startup CPU > mode is checked using SMSW instruction. Bit 0 equals 0, if real mode > and 1, if PMode/V86. This is done to avoid conflicts with EMM386 and > similar drivers and Windows. > > TUT02 Sets up GDT, goes to PMode, prints "Hello from PMode!" and goes > back. > > TUT03 The same GDT as before, IDT is setup for software ISR (Int 20h) and > divide by zero exception (Int 0). Tut shows work of these handlers. > Note, these handlers are defined as 286 ones (see ACS_INT_GATE in > the > PM_DEFS.H file). > > TUT04 The same GDT as before, IDT is setup for all exceptions, > you may now see type and address of an exception. Try different > exceptions and see what's going on. > Note, all handlers are defined as 386 ones now. > Note #2: since all exception handler wrappers call one common > exception handler and there is no additional stack provided, stack > faults are not handled properly. Basically such a design is good > for GPFs, TSS exception and similar things. > > TUT05 The same GDT as before, almost the same IDT as in TUT04. Two IDT > entries and IRQ handlers are added -- IRQ0 (timer) and > IRQ1 (keyboard). The tut reprograms PIC in order to handle IRQs > in PMode. > > TUT06 Almost the same as TUT05. Task switching is added. main() switches > to task() using a jump to TSS. Then task() waits for the ESC key. > After ESC, task() switches back to main(). Both tasks are PL#0. > Note, for such PL#0 tasks I/O map is not needed in TSS. Since there > are only PL#0 tasks, there is no need to setup stacks for interlevel > calls (SS0:ESP0,SS1:ESP1,SS2:ESP2). > > TUT07 Multitasking again. 3 PL#0 tasks (main(), task1(), task2()) work > now. > Task switches are scheduled by a scheduler called from timer IRQ > ISR. > I.e. preemptive multitasking. > > TUT08 Demo of page translation. The demo shows 16 color bars in 3 cases: > 1. page translation disabled (linear addresses equal physical ones) > Bars are drawn in the black, blue, ... yellow, white order > 2. page translation enabled (linear addresses equal physical ones) > Bars are drawn in the black, blue, ... yellow, white order > 3. page translation enabled (linear addresses don't equal physicals) > Bars are drawn in the opposite order: white,yellow,...,blue,black > > TUT09 Back to preemptive multitasking... :-) This tutorial is a bit > different to TUT07. It doesn't use TSS for task switchings now. > It uses stack-based switching instead. People say it's faster than > TSS-based method. Dunno, perhaps they're correct. MS Windows > uses this stuff a lot. Btw, this method also applicable to almost > any > CPU. Even PC/XT made on 8086/8088 CPUs could have such task > switching. ;-) > > TUT10 Well, let's have a rest. :-) This tutorial shows Big/Unreal Mode, > i.e. accessing RAM in real mode with use of just a 32-bit offset. > Yeah, it's really possible. In fact, you may access up to 4GB > of RAM from Real mode this way. > > TUT11 It's almost the same as TUT07. The only difference is that task1() > and task2() tasks are 32-bit (32-bit code segments with 32-bit > instructions) and these tasks are in privilege level 3, IOPL=3 too. > New GDT entires added for PL#3 code and data segments respectively. > Screen segment is also redefined as PL#3. > > TUT12 The same as TUT11. 2 LDTs are added for each PL#3 task. > > TUT13 Multitasking. First time we run a Virtual 8086 machine here. > > TUT14 Advanced V86 stuff. A software Int nn is now supported for V86 > tasks. > > TUT15 A working V86 monitor. It redirects IRQs to the V86 task now. So we > have our DOS stuff in V86 mode just like DOS-box in Windows. > > > Bye. > Alexei A. Frounze > ----------------------------------------- > Homepage: http://alexfru.chat.ru > Mirror: http://members.xoom.com/alexfru >