Message-ID: <00ab01bda757$039daba0$7a4d08c3@arthur> From: "Arthur" To: "DJGPP Mailing List" Subject: Re: 64k demo Date: Sat, 4 Jul 1998 15:11:42 +0100 MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Precedence: bulk >> You say "only." I know of no other processor other than the x86 (and >> compatibles) that have such an illogical and unfriendly instruction set. > >That's because you don't know much about RISC processors. That's a bit harsh. I do actually know a bit about RISC processors, and of the processors I know the x86 is the hardest to program. The 8086 was not a RISC processor, and yet (some) 8086 programs will run on my P200MMX. To be able to do this there must be some backwards compatability between processors. The x86 family was not originally intended to be a RISC based chip. The Pentium (and others) have therefore a mish-mash of new instructions and old instructions with the original structure of the 8086, so how can it be truly a RISC? It seems to me (in comparison with something like the Archemedes, which _is_ a RISC computer) that the x86 is a sort of hybrid chip - sort of quasi-RISC. In this case what is the advantage of the chip being a RISC? James Arthur jaa AT arfa DOT clara DOT net