Message-Id: Comments: Authenticated sender is From: "Salvador Eduardo Tropea (SET)" Organization: INTI To: peter AT anywhere DOT de, djgpp AT delorie DOT com Date: Mon, 23 Feb 1998 11:07:46 +0000 MIME-Version: 1.0 Content-type: text/plain; charset=US-ASCII Content-transfer-encoding: 7BIT Subject: Re: CPU PCI read burst In-reply-to: <6cnme9$60o$1@news01.btx.dtag.de> Precedence: bulk Peter DOT Henn AT t-online DOT de (Peter) wrote: > Hello PCI freaks, > I want to read memory on a PCI adapter card as fast as possible. > There is no problem to generate write burst on the PCI bus. The > command "_movedatal" in the "sys/movedata.h" from the DJGPP compiler > do this very fine and I see the burst on my LA. Also the PCI interface > hardware can handle this easy save address-data pairs in a FIFO. > > But the problem is to read the PCI adapters memory (e.g. graphic > card) from the CPU in PCI burst mode (or multiple read > transactions). > --> Where can I find an example C-code? > > If the CPU put a read command and the address on the PCI bus it will > normally wait until it get the data from the PCI adapter. So possible > I must access the PCI adapter memory in a CPU cached mode to generate > burst transfers. Naturally the cache lines must be invalidated before to > garantee cache coherence. Peter: _movedatal doesn't make any special thing, it just uses the normal CPU instructions. So I think that here is the PCI bridge the one that makes the work so I don't know if you can write a generic code to get the maximun speed in situations where the PCI chipset doesn't make it automagically. Is just an opinion. SET ------------------------------------ 0 -------------------------------- Visit my home page: http://set-soft.home.ml.org/ or http://www.geocities.com/SiliconValley/Vista/6552/ Salvador Eduardo Tropea (SET). (Electronics Engineer) Alternative e-mail: set-sot AT usa DOT net - ICQ: 2951574 Address: Curapaligue 2124, Caseros, 3 de Febrero Buenos Aires, (1678), ARGENTINA TE: +(541) 759 0013