Message-ID: <32A227C1.7E@gbrmpa.gov.au>
Date: Mon, 02 Dec 1996 08:56:15 +0800
From: Leath Muller <leathm AT gbrmpa DOT gov DOT au>
Reply-To: leathm AT gbrmpa DOT gov DOT au
Organization: Great Barrier Reef Marine Park Authority
MIME-Version: 1.0
To: "G.P. Tootell" <gpt20 AT thor DOT cam DOT ac DOT uk>
CC: djgpp AT delorie DOT com
Subject: Re: Optimization
References: <57hg9b$or5 AT kannews DOT ca DOT newbridge DOT com> <329C95AD DOT C3E AT silo DOT csci DOT unt DOT edu> <57k531$5bu AT kannews DOT ca DOT newbridge DOT com> <slrn59ubiq DOT nb DOT nxk3 AT b63526 DOT student DOT cwru DOT edu> <57nsm0$cvp AT lyra DOT csx DOT cam DOT ac DOT uk>
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G.P. Tootell wrote:
> 
> |>   "To gain efficiency in the implementation of the internal cache, storage is
> |>   allocated in chunks of 128 bits, called cache lines.  External caches are not
> |>   likely to use cache lines smaller than those of the internal cache."
> |>   [...]
> |>   "To simplify the hardware implementation, cache lines can only be mapped to
> |>   aligned 128-bit blocks of main memory."
> 
> ok. i'm confused now. i thought the cache was 32 bytes but 128 bits is 16 bytes
> no? so just how big is the cache :) or did it change between the 486 and pentium?

The cache is 32 bytes in a Pentium, 16 in a 486...

Leathal.