To: Kimberley Burchett Cc: DJGPP Mailing List , collison AT sw DOT stratus DOT com Subject: Re: this is optimization? Date: Thu, 13 Oct 94 10:20:06 -0400 From: Mike Collison > I was going over the asm output of a program and I came across this > little snippet: > movl %eax,-4(%ebp) > movl -4(%ebp),%eax > There wasn't a label in between or anything, just this totally useless > instruction. This was with -O3. > I've also come across silly little things like this: > movl %eax,%edx > sall %edx,6 > movl %edx,%eax > instead of: > sall %edx,6 > movl %eax,%edx > Another useless instruction, but this one is a little more vague so I >guess I can forgive the compiler (barely). But the first example is just >ridiculous! Am I familiar with code like this. I recently ported GCC to a 16-bit fixed point DSP with very few registers. I see code like this on medium to large cod efragments. The 386 also has very few registers. This code is being generated by the 'reload' phase of GCC (you could think of it as the register spill phase of other compilers, although that's not quite accurate). GCC is really tuned for machines with large number of registers (RISC) where you never see code like this. I've mentioned code like this to Richard Kenner, the primary GCC maintainer but he doens't really have time to look at code like this. One of these days i'm just going to have to sit down and figure out where and why it's happenning and fix it. One easy fix to the above problems would be to add peephole optimizations to the 386 machine description to catch these. The problem with this of course is the fact that there are many such examples and it would be difficult to catch every case. Mike .