Date: Mon, 6 Sep 1993 14:39:00 +0200
From: "Grzegorz B. Mazur" <gbm AT ii DOT pw DOT edu DOT pl>
To: djgpp AT sun DOT soe DOT clarkson DOT edu
Subject: VL bus mysteries



I have some experience with VL cards, including graphics boards...
The bus is as fast as the card. Usually the bus interface of the controller
chip works with 1..2 wait states, at least on good cards (Tseng, ALI). On some
worse stuff (Cirrus 5426, Paradise (!)) the chip works with 5..7 wait states,
which doesn't make too much sense.
This is the speed of the interface, not of video memory. The video memory
is much slower, and thhe accesses must be synchronized with display refresh,
so the speed of block transfers cannot be so high as the speed of bus interface.
Fortunately, all the controllers for VL include write buffers, so the can compensate for speed of dram access, at least in most cases.
Note however, that if you perform a block transfer, the write buffer cannot
catch all of your data, especially if you use REP MOVS instruction. The buffer
is usually 4..8 longwords deep. So if you transfer data in large blocks, the 
CPU must wait for video memory, not only for the write buffer...

Gregory