From: jhorigan AT mipos2 DOT intel DOT com (John Horigan)
Subject: Re: Memory management (ugh!)
To: djgpp AT sun DOT soe DOT clarkson DOT edu (DJGPP mailing list)
Date: Mon, 12 Apr 93 14:51:39 PDT

> 
> Ok, this is probably an ExtremelyFAQ, but I hate the EMMs, QEMMs and
> what's-this-MMs and consequently have lost interest in learning how they work.
> (I guess I must do that some day)
> 
> I would like some simple instructions: My system is a 486/33, DOS 5.0, 8 megs
> of RAM, HIMEM.SYS and EMM386.EXE. My current autoexec.bat and config.sys
> have the following lines:
> 
> DEVICE=C:\DOS\HIMEM.SYS
> DEVICE=C:\DOS\EMM386.EXE 2048 i=e000-efff ram  (I have a Trident VGA card and
> got this line from a friend)
> 
> Also, I use SMARTDRV.EXE with a 2M cache.  The compiler and Go32 complain "The
> CPU must be in REAL mode (not V86 mode) to run this program." I understand
> that this is because of the ex{tended|panded} memory drivers, but what should
> I do or use to get the compiler to work? Thank you.
> 
> - tjp AT jyu DOT fi
> 

If you are using EMM386 just for loading TSRs in upper memory and have
no apps that require EMS then you should use Chris Blum's UMB_DRVR. This
program gives DOS 5 all available upper memory without leaving _any_
resident code or taking the CPU out of real-address mode. It does this
by knowing about your chip set. When it loads it accesses you chip set
and turns on the blocks of RAM that you tell it to turn on, then it
assumes the identity of an XMS 2.0 (so it must be loaded before HIMEM.SYS)
driver and tells DOS 5 about the upper memory. After DOS 5 snarfs the 
memory UMB_DRVR exits. You can even load HIMEM.SYS into upper memory.
DMA transfers to buffers in upper memory without problems. I have used
this program with DOS 5/6, Windows 3.x, DJGPP, Stacker, and others.
Version 5.22 is available now at the Micro Connection (216)262-4486
and supports many chip sets, 5.23 is coming out soon.


P.S. I have no relation with Chris Blum other than as a satisfied
customer and I do not speak for Intel wrt UMB_DRVR.


--------------------------------------------------------------------------
John W. Horigan     GRP Engineer   Architecture Verification  M/S: RN2-27
Intel, Santa Clara  (408)765-4773  jhorigan AT mipos2 DOT intel DOT com  RNB2 pole L5